Chip Architect

Tel Aviv, Yokneam

About The Position

Chain reaction is a startup company developing hardware infrastructure for blockchain and privacy preserving applications and services. 

We develop ASIC and system accelerators for both the enterprise blockchain market and the crypto mining market. 

Our multidisciplinary team combines dozens of years of experience in developing and manufacturing high-end ASIC products with the highest quality standards. 

3 in a 1 – our hybrid working model

We work in hybrid working model where you can join and enjoy, the 27th floor view in Tel Aviv office, the beautiful landscape of our office in Yokneham or the best your home office offers. This will enable you to enjoy autonomy, flexibility, and the ability to change your work location as you choose. Traditionally the SW group is in Tel Aviv and the HW group is in Yokneham, and you can decide what works for you as your “home base”.

We are looking for a Chip Architect to take a major role in our next SoC project.  

Responsibilities:

  • Define our next generation chip architecture end to end from the market requirements through algorithms, software and design. Work with related industry customers and partners. 
  • Define specifications for the different implementation groups (logic design and verification, SW) 
  • Work on proof of concept and early engagements with customers 
  • Perform research and analysis for current and future architectures. 
  • Collaborate with teams across the company  
  • Serve as a focal point within the organization and distribute the knowledge that you acquire. 

Requirements

  • BSc or MSc in Electrical Engineering or Computer Engineering 
  • 5+ years of relevant experience (Architecture / Logic design / Verification / System) 
  • Knowledge and experience in SoC architectures  
  • Strong independence and self-learning skills 

Preferred: 

  • Experience with any of the below: 
  • SoC memory sub-system, bus fabric and DDR interfacing 
  • Embedded CPU subsystems  
  • HW/SW interface definitions 
  • PCIe interface  
  • SoC security 
  • Mathematical function offloads - data path and implementation 
  • Past experience in RTL design 

Apply for this position